{SSE ... SSSE3 (etc...)} optimization vs {MMX ... SSE2}
log in

Advanced search

Message boards : Application Code Discussion : {SSE ... SSSE3 (etc...)} optimization vs {MMX ... SSE2}

Author Message
HireMe.geek.nz
Send message
Joined: 12 Jun 09
Posts: 11
Credit: 36,756
RAC: 46
Message 46486 - Posted: 7 Mar 2011 | 16:33:48 UTC
Last modified: 7 Mar 2011 | 16:35:03 UTC

FPU / SSE / SSE2 / SSE3 / SSSE3 (etc)
optimization
vs
FPU / MMX / SSE

As a screensaver is coming, and the core science application will have to be optimized (at least at the command line interface of the compiler) for SSE and beyond yet again.

The SSE optimization so far has paid off, but more experimentation and tries at SSE3 and SSSE3 should be tried.

I don't know about user uptake of SSE4 or SSE5 at this time. As for the other more advanced instructions, one will have to wait.

I would almost expect Intel to totally dump MMX in the future -- there is not an infinite amount of room for all the logic gates.

Post to thread

Message boards : Application Code Discussion : {SSE ... SSSE3 (etc...)} optimization vs {MMX ... SSE2}


Main page · Your account · Message boards


Copyright © 2013 AstroInformatics Group